Intel Announces 18A Process Node, Targeting Mid-2025 Tape-Out

The 1.8nm-class technology introduces groundbreaking innovations like backside power delivery and gate-all-around transistors, aiming to challenge TSMC and Samsung.

Intel's 18A process node, its first 1.8nm-class technology, is officially ready, with tape-out expected in the first half of 2025.
Key innovations include PowerVia, a backside power delivery network, and RibbonFET, Intel's take on gate-all-around transistor technology, enabling improved power efficiency and chip density.
The 18A node promises a 30% increase in chip density and a 15% improvement in performance per watt compared to Intel 3, and is designed for use in products like Panther Lake processors and Clearwater Forest server CPUs.
Intel positions 18A as a competitive alternative to TSMC's N2 process, which is expected to debut in 2026, potentially giving Intel an edge in timing and certain performance metrics.
The technology is part of Intel's strategy to regain leadership in the semiconductor industry and has been selected for U.S. government applications, further highlighting its strategic importance.